x86 svm: Add support for Pause Filtering to AMD SVM

New AMD processors will support the Pause Filter Feature.
This feature creates a new field in the VMCB called Pause
Filter Count.  If Pause Filter Count is greater than 0 and
ntercepting PAUSEs is enabled, the processor will increment
an internal counter when a PAUSE instruction occurs instead
of intercepting.  When the internal counter reaches the
Pause Filter Count value, a PAUSE intercept will occur.

This feature can be used to detect contended spinlocks,
especially when the lock holding VCPU is not scheduled.
Rescheduling another VCPU prevents the VCPU seeking the
lock from wasting its quantum by spinning idly.

Experimental results show that most spinlocks are held
for less than 1000 PAUSE cycles or more than a few
thousand.  Default the Pause Filter Counter to 3000 to
detect the contended spinlocks.

Processor support for this feature is indicated by a CPUID
bit.

On a 24 core system running 4 guests each with 16 VCPUs,
this patch improved overall performance of each guest's
32 job kernbench by approximately 1%.  Further performance
improvement may be possible with a more sophisticated
yield algorithm.

Signed-off-by: Mark Langsdorf <mark.langsdorf@amd.com>

diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
index 505a5149c62067fe7b684c41b257888430d7e9d2..7aceec8b8057e0f4d2199873ac0986a260117380 100644 (file)
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -1508,6 +1508,14 @@ asmlinkage void svm_vmexit_handler(struct cpu_user_regs *regs)
         vmcb->interrupt_shadow = 1;
         break;
 
+    case VMEXIT_PAUSE:
+        /*
+         * The guest is running a contended spinlock and we've detected it.
+         * Do something useful, like reschedule the guest
+         */
+       do_sched_op_compat(SCHEDOP_yield, 0);
+       break;
+
     default:
     exit_and_crash:
         gdprintk(XENLOG_ERR, "unexpected VMEXIT: exit reason = 0x%x, "

diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c
index 9c4a3cca89c58a136aba90a65f3a9e840a71b1b7..9cc14d1a03152d46ab1b58c2d62f5429006750d4 100644 (file)
--- a/xen/arch/x86/hvm/svm/vmcb.c
+++ b/xen/arch/x86/hvm/svm/vmcb.c
@@ -247,6 +247,12 @@ static int construct_vmcb(struct vcpu *v)
         vmcb->exception_intercepts |= (1U << TRAP_page_fault);
     }
 
+    if ( cpu_has_pause_filter )
+    {
+        vmcb->pause_filter_count = 3000;
+        vmcb->general1_intercepts |= GENERAL1_INTERCEPT_PAUSE;
+    }
+
     return 0;
 }
 

diff --git a/xen/include/asm-x86/hvm/svm/svm.h b/xen/include/asm-x86/hvm/svm/svm.h
index dc62a7fba2a49671fd6b168576c20318e411cfd7..9020aabffa176bf7d918ad0ecadfb4331e4ad55a 100644 (file)
--- a/xen/include/asm-x86/hvm/svm/svm.h
+++ b/xen/include/asm-x86/hvm/svm/svm.h
@@ -67,10 +67,12 @@ extern u32 svm_feature_flags;
 #define SVM_FEATURE_LBRV    1
 #define SVM_FEATURE_SVML    2
 #define SVM_FEATURE_NRIPS   3
+#define SVM_FEATURE_PAUSEF  10
 
 #define cpu_has_svm_npt     test_bit(SVM_FEATURE_NPT, &svm_feature_flags)
 #define cpu_has_svm_lbrv    test_bit(SVM_FEATURE_LBRV, &svm_feature_flags)
 #define cpu_has_svm_svml    test_bit(SVM_FEATURE_SVML, &svm_feature_flags)
 #define cpu_has_svm_nrips   test_bit(SVM_FEATURE_NRIPS, &svm_feature_flags)
+#define cpu_has_pause_filter  test_bit(SVM_FEATURE_PAUSEF, &svm_feature_flags)
 
 #endif /* __ASM_X86_HVM_SVM_H__ */

diff --git a/xen/include/asm-x86/hvm/svm/vmcb.h b/xen/include/asm-x86/hvm/svm/vmcb.h
index 47efa8d75a12ee4f1b6125f8bae37ad0b2662453..d6da23584b7d6aa4937dea56f2ce31a4471dacb0 100644 (file)
--- a/xen/include/asm-x86/hvm/svm/vmcb.h
+++ b/xen/include/asm-x86/hvm/svm/vmcb.h
@@ -375,7 +375,9 @@ struct vmcb_struct {
     u64 res03;                  /* offset 0x20 */
     u64 res04;                  /* offset 0x28 */
     u64 res05;                  /* offset 0x30 */
-    u64 res06;                  /* offset 0x38 */
+    u32 res06;                  /* offset 0x38 */
+    u16 res06a;                 /* offset 0x3C */
+    u16 pause_filter_count;     /* offset 0x3E */
     u64 iopm_base_pa;           /* offset 0x40 */
     u64 msrpm_base_pa;          /* offset 0x48 */
     u64 tsc_offset;             /* offset 0x50 */